The present invention relates to a semiconductor device capable of selecting one function from a plurality of functions and, more particularly, to a semiconductor device having a bonding optional circuit as a function selecting circuit.
With recent increases in the integration density of semiconductor devices, the number of manufacturing steps thereof and the facility therefor are considerably increased, making manufacturing of a variety of different semiconductor devices difficult. That is, if semiconductor devices having different functions were manufactured separately through different manufacturing processes, respectively, the manufacturing efficiency would likely be degraded and the total number of manufacturing steps would be considerably increased. In order to solve such problem, it is conventional for an integrated circuit which can perform a plurality of different functions to be preliminarily formed on a semiconductor substrate so that any one of these functions can be selected by using predetermined terminal(s) thereof. In such a case, when the semiconductor device is needed to perform some functions sequentially in accordance with demands, a control signal or signals for selecting a function to be performed are required to be supplied to the semiconductor device through a specific external lead or leads while the semiconductor device is operating.
On the other hand, when the semiconductor device need to perform only a certain function continuously, the function of the semiconductor device can be preliminarily selected by bonding the state of a certain terminal for function selection at a bonding step after formation of the integrated circuit. Particularly, there are a variety of, for example, semiconductor memory devices which have different optional functions with respect to a bit-construction, a refresh-cycle and a page-mode although their basic constructions are common. Since, typically such various functions are not required to be arbitrarily switched, it is effective to select a function of each semiconductor device at the bonding step after a number of integrated circuits are formed through a common process.
A semiconductor device whose function is selected at a bonding step of its manufacturing process will be described with reference to FIG. 1. A semiconductor integrated circuit device 46 shown in FIG. 1 includes, within an integrated circuit chip 45 encapsulated in a case 48, a bonding option judging circuit 40, an internal circuit 49 and a bonding pad 44 which is selected to be connected or not to an external lead pin by a bonding wire. In this drawing, the pad 44 is connected or bonded to an external grounding lead or pin GNDPIN by a wire 47. The bonding option judging circuit 40 includes a level detection circuit 42 composed of an inverter IV1 and connected to the bonding option pad 44, an output waveform shaping circuit portion 43 having series-connected inverters IV2 and IV3 and responding to a signal from the level detection circuit 42 to output an output signal BOPT, and a bias circuit 41 supplying the logic high level to the circuit 42 when the bonding pad 44 is not connected to the pin GNDPIN. The bias circuit 41 includes a p-type MOS transistor Q5 connected between the bonding pad 44 and a power voltage source V.sub.DD and having a gate grounded. This MOS transistor Q5 thus serves as a resistor.
An operation of the semiconductor device 46 will be described. When the bonding option pad 44 is connected to the external grounding lead GNDPIN by the wire 47 as shown in FIG. 1, since the current drive capability of the MOS transistor Q5 is set to a sufficiently small value, the potential of the bonding option pad 44 is substantially equal to the ground potential and therefore an input signal BOIN to the bonding judging circuit 42 is the low level. Thus, the level detection circuit 42 outputs the high level output which causes the output waveform shaping circuit portion 43 to the high level signal BOPT. On the other hand, when the bonding option pad 44 is not connected to the pin GNDPIN, the potential of the bonding option pad 44 is increased up to the potential of the power source V.sub.DD by the MOS transistor Q5 of the bias circuit 41. Thus, the high level input signal BOIN is supplied to the circuit 42, resulting in generation of the low level output signal BOPT from the output waveform shaping circuit 43. The output signal BOPT is supplied to the internal circuit 49. Thus, the internal circuit 49 selects and performs a certain function corresponding to the level of the output signal BOPT.
In the bonding option judging circuit 40 thus constructed, the MOS transistor Q5 of the floating measure circuit portion 41 is always in a conductive state. For this reason, when the bonding option pad 44 is connected to the external grounding lead GNDPIN, it continuously consumes power. In order to suppress the power consumption, therefore, it is preferable that the current drive capability of the P-type MOS transistor Q5, i.e. the impedance thereof, is made very small. In this case, however, it takes for a long time for the transistor Q5 to raise the potential of the bonding option pad 44 in response to the power voltage switch-on when the bonding pad 44 is not connected to the pin GNDPIN. This means that the transistor Q5 hardly increases the signal BOIN above the threshold level of the inverter IV1 within a predetermined time, so that the circuit 40 may hold its output BOTP at the low level when the internal circuit 49 fetches the signal BOTP in spite of the pad 44 being not connected to the pin GNDPIN. The function of the internal circuit 49 may be thus selected erroneously.